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Pull requests: riscv-collab/riscv-openocd

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Pull requests list

target/riscv: new ebreak controls
#1168 opened Nov 14, 2024 by en-sc Loading…
target/riscv: pass memory access info in struct, move write_memory pointer
#1167 opened Nov 14, 2024 by fk-sc Loading…
2
target/riscv: detailed error messages for cases when resume operation fails
#1165 opened Nov 13, 2024 by aap-sc Loading…
15
Merge up to fd62626dff25cf503a25040d3040b0a2bb9b2a76 from upstream
#1163 opened Nov 12, 2024 by en-sc Loading…
@en-sc
2
target/riscv: allow hexadecimal values to expose_csr-like commands
#1162 opened Nov 9, 2024 by aap-sc Loading…
17
target/riscv: support disable auto fence
#1157 opened Oct 29, 2024 by zqb-all Loading…
19
target/riscv:Perform single step before resume if necessary
#1144 opened Oct 9, 2024 by sunnyzhu-learning Loading…
94
target/riscv: Consistent data type for trigger indexes
#1141 opened Oct 3, 2024 by JanMatCodasip Loading…
1
try all triggers when setting itrigger/etrigger/icount breakpoints
#1128 opened Sep 5, 2024 by aap-sc Loading…
7
enable additional platforms in CI
#1121 opened Aug 30, 2024 by aap-sc Loading…
14
Fix error on exit with uninitialized target
#1015 opened Feb 11, 2024 by tom-van Loading…
3
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