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Add AXIS Cache IP, FPGA code housekeeping, etc. #826
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Commits on Nov 18, 2024
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fpga: Add driver for new register interface of axis cache IP
Signed-off-by: Niklas Eiling <[email protected]>
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fpga: Add new Dino configuration register that allows triggering the …
…DAC before the time step to dino.cpp Signed-off-by: Niklas Eiling <[email protected]>
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fpga: Add axis_cache.cpp to CMakeLists.txt
Signed-off-by: Niklas Eiling <[email protected]>
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fpga: Fix I2c causing an error when Dino FMC is not connected. We loo…
…se the self check, but this is not really possible if there is no Dino FMC. Signed-off-by: Niklas Eiling <[email protected]>
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hooks: Cast hook should also work for writes.
Signed-off-by: Niklas Eiling <[email protected]>
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Signed-off-by: Niklas Eiling <[email protected]>
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fpga/ips: add invalidate method to AxisCache and whitelist the IP in …
…hwdef-parse.py Signed-off-by: Niklas Eiling <[email protected]>
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Signed-off-by: Niklas Eiling <[email protected]>
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fpga: consolidate and update FPGA config examples
Signed-off-by: Niklas Eiling <[email protected]>
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fpga/ip/i2c: remove dead code and improve comment.
Signed-off-by: Niklas Eiling <[email protected]>
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fpga: Apply suggestions from code review
Co-authored-by: Steffen Vogel <[email protected]> Signed-off-by: Niklas Eiling <[email protected]>
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Signed-off-by: Niklas Eiling <[email protected]>
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fpga: remove exceptions from AxisCache
Signed-off-by: Niklas Eiling <[email protected]>
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