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WIP: integration test #368

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f4ddd9a
wip
kunxian-xia Oct 28, 2024
b24c98a
wip
kunxian-xia Oct 29, 2024
9dd45db
include all opcodes in rv32im config
kunxian-xia Oct 29, 2024
05b46ca
ignore ecall other than halt
kunxian-xia Oct 29, 2024
37d0666
redirect X0 writes to X32
kunxian-xia Oct 30, 2024
41cbb09
taplo fmt
kunxian-xia Oct 30, 2024
3ec6bf7
print out more info for debugging
kunxian-xia Oct 31, 2024
ab2c12b
Merge remote-tracking branch 'origin/master' into feat/guest-example
kunxian-xia Oct 31, 2024
71dfac6
commit opcode circuits first
kunxian-xia Oct 31, 2024
ea12939
debugging sumcheck prover hang
kunxian-xia Oct 31, 2024
0080e6c
more debugging info
kunxian-xia Oct 31, 2024
8b8f820
fix
kunxian-xia Oct 31, 2024
3e9e8d2
Merge remote-tracking branch 'origin/master' into feat/guest-example
kunxian-xia Oct 31, 2024
e605d85
fmt
kunxian-xia Oct 31, 2024
b6ac182
feat/vm-circuits: collect all instructions in the VM config
Nov 1, 2024
1d3d9a3
fix/0-instances
Nov 1, 2024
c0549a5
fix/0-instances: Test an empty circuit
Nov 1, 2024
5cc0ec9
Merge branch 'fix/0-instances' into feat/vm-circuits
Nov 1, 2024
c51db7f
Merge branch 'master' into fix/0-instances
naure Nov 1, 2024
9cea5d3
add more table circuits in rv32im config
kunxian-xia Nov 1, 2024
266be39
Merge branch 'master' into fix/0-instances
naure Nov 2, 2024
5e83e52
Merge branch 'master' into fix/0-instances
naure Nov 4, 2024
614fe9d
Merge branch 'master' into fix/0-instances
naure Nov 4, 2024
c8244cd
fix: disable unintended parallel processing in sumcheck stage 1 (#530)
hero78119 Nov 4, 2024
2341438
Merge branch 'fix/0-instances' into feat/vm-circuits
naure Nov 5, 2024
f63be53
Merge branch 'master' into feat/guest-example
Nov 6, 2024
1291502
feat/guest-example: fix after merge
Nov 6, 2024
e6b4ea7
Merge branch 'master' into feat/guest-example
Nov 6, 2024
85b58c8
Merge branch 'master' into feat/vm-circuits
naure Nov 6, 2024
19a8dbf
feat/vm-circuits: add everything
Nov 6, 2024
27c5e83
Merge branch 'feat/vm-circuits' into feat/guest-example-tmp
Nov 6, 2024
900cac2
Merge branch 'master' into feat/guest-example
kunxian-xia Nov 7, 2024
22da49c
Merge branch 'master' into feat/guest-example
kunxian-xia Nov 7, 2024
44a205a
feat/guest-example: support empty PI vector
Nov 7, 2024
4036b00
feat/guest-example: optional halt
Nov 7, 2024
bd3db94
feat/guest-example: find end_pc
Nov 7, 2024
6576c42
feat/guest-example: parameter --max-steps
Nov 7, 2024
6dd10c3
Merge branch 'master' into feat/guest-example
Nov 7, 2024
988f15c
use mock prover to find errors
kunxian-xia Nov 8, 2024
9121333
run fibonacci in ci
kunxian-xia Nov 8, 2024
a56885a
fix lint error
kunxian-xia Nov 8, 2024
803f7e5
Merge branch 'master' into feat/guest-example
kunxian-xia Nov 8, 2024
a2e9cea
add ecall dummy circuit
kunxian-xia Nov 11, 2024
cc4a8ad
Merge branch 'master' into feat/guest-example
Nov 11, 2024
6c50c79
Feat/guest example dummy (#574)
naure Nov 11, 2024
4a9ab4b
feat/guest-example: increase range of RW program data
Nov 12, 2024
c624003
Fix: assignment of Memory Finalize (#583)
kunxian-xia Nov 12, 2024
c5fef04
feat/guest-example: refactor SetTableSpec + flexible addr assign
Nov 12, 2024
e467598
feat/guest-example: program_data_final
Nov 12, 2024
ea47cd8
feat/guest-example: fix memory final assignment
Nov 14, 2024
e0d69c0
feat/guest-example: include the stack in mem init
Nov 14, 2024
cfd2545
feat/guest-example: remove usage of rom_start
Nov 14, 2024
8945aec
feat/guest-example: start separating memory circuits
Nov 14, 2024
db601c9
feat/guest-example: remove unused mem_config
Nov 14, 2024
9c81398
feat/guest-example: move all mem circuits to MMU
Nov 14, 2024
3a78b11
Merge branch 'master' into feat/guest-example
Nov 15, 2024
a5e1d02
feat/guest-example: validator of memory ranges
Nov 15, 2024
a1181e1
feat/guest-example: increase stack size
Nov 15, 2024
efed100
feat/guest-example: extend data size
Nov 15, 2024
bb0cbbf
Typo
naure Nov 15, 2024
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5 changes: 5 additions & 0 deletions .github/workflows/integration.yml
Original file line number Diff line number Diff line change
Expand Up @@ -57,3 +57,8 @@ jobs:
env:
RAYON_NUM_THREADS: 2
run: cargo run --package ceno_zkvm --example riscv_opcodes --target ${{ matrix.target }} -- --start 10 --end 11

- name: Run fibonacci
env:
RAYON_NUM_THREADS: 2
run: cargo run --package ceno_zkvm --example fibonacci_elf --target ${{ matrix.target }} --
14 changes: 14 additions & 0 deletions Cargo.lock

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2 changes: 2 additions & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,8 @@ crossbeam-channel = "0.5"
ff = "0.13"
goldilocks = { git = "https://github.com/scroll-tech/ceno-Goldilocks" }
itertools = "0.13"
num-derive = "0.4"
num-traits = "0.2"
paste = "1"
plonky2 = "0.2"
poseidon = { path = "./poseidon" }
Expand Down
2 changes: 2 additions & 0 deletions ceno_emul/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,8 @@ version.workspace = true
[dependencies]
anyhow = { version = "1.0", default-features = false }
elf = "0.7"
num-derive.workspace = true
num-traits.workspace = true
strum.workspace = true
strum_macros.workspace = true
tracing.workspace = true
Expand Down
16 changes: 8 additions & 8 deletions ceno_emul/src/elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -89,13 +89,6 @@ impl Program {
.filter(|x| x.p_type == elf::abi::PT_LOAD)
.enumerate()
{
tracing::debug!(
"loadable segement {}: PF_R={}, PF_W={}, PF_X={}",
idx,
segment.p_flags & PF_R != 0,
segment.p_flags & PF_W != 0,
segment.p_flags & PF_X != 0,
);
let file_size: u32 = segment
.p_filesz
.try_into()
Expand All @@ -114,7 +107,8 @@ impl Program {
.p_vaddr
.try_into()
.map_err(|err| anyhow!("vaddr is larger than 32 bits. {err}"))?;
if (segment.p_flags & PF_X) != 0 {
let p_flags = segment.p_flags;
if (p_flags & PF_X) != 0 {
if base_address.is_none() {
base_address = Some(vaddr);
} else {
Expand All @@ -124,6 +118,12 @@ impl Program {
if vaddr % WORD_SIZE as u32 != 0 {
bail!("vaddr {vaddr:08x} is unaligned");
}
tracing::debug!(
"ELF segment {idx}: {}{}{} vaddr=0x{vaddr:08x} file_size={file_size} mem_size={mem_size}",
if p_flags & PF_R != 0 { "R" } else { "-" },
if p_flags & PF_W != 0 { "W" } else { "-" },
if p_flags & PF_X != 0 { "X" } else { "-" },
);
let offset: u32 = segment
.p_offset
.try_into()
Expand Down
4 changes: 2 additions & 2 deletions ceno_emul/src/platform.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,11 +40,11 @@ impl Platform {

// TODO figure out proper region for program_data
pub const fn program_data_start(&self) -> Addr {
0x3000_0000
0x4000_0000
}

pub const fn program_data_end(&self) -> Addr {
0x3000_1000 - 1
0x5000_0000 - 1
Comment on lines +43 to +47
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Collaborator Author

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Maybe leave some comments for these two magic numbers.

}

// TODO figure out a proper region for public io
Expand Down
3 changes: 2 additions & 1 deletion ceno_emul/src/rv32im.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
// limitations under the License.

use anyhow::{Result, anyhow};
use num_derive::ToPrimitive;
use std::sync::OnceLock;
use strum_macros::EnumIter;

Expand Down Expand Up @@ -132,7 +133,7 @@ pub enum InsnFormat {
}
use InsnFormat::*;

#[derive(Clone, Copy, Debug, PartialEq, EnumIter)]
#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, EnumIter, ToPrimitive)]
#[allow(clippy::upper_case_acronyms)]
pub enum InsnKind {
INVALID,
Expand Down
15 changes: 5 additions & 10 deletions ceno_emul/src/vm_state.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,16 +53,7 @@ impl VMState {

pub fn new_from_elf(platform: Platform, elf: &[u8]) -> Result<Self> {
let program = Program::load_elf(elf, u32::MAX)?;
let state = Self::new(platform, program);

if state.program.base_address != state.platform.rom_start() {
return Err(anyhow!(
"Invalid base_address {:x}",
state.program.base_address
));
}

Ok(state)
Ok(Self::new(platform, program))
}

pub fn halted(&self) -> bool {
Expand All @@ -73,6 +64,10 @@ impl VMState {
&self.tracer
}

pub fn platform(&self) -> &Platform {
&self.platform
}

pub fn program(&self) -> &Program {
self.program.deref()
}
Expand Down
1 change: 1 addition & 0 deletions ceno_zkvm/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@ sumcheck = { version = "0", path = "../sumcheck" }
transcript = { path = "../transcript" }

itertools.workspace = true
num-traits.workspace = true
paste.workspace = true
prettytable-rs.workspace = true
strum.workspace = true
Expand Down
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