Skip to content

Commit

Permalink
Merge of 459866e
Browse files Browse the repository at this point in the history
  • Loading branch information
nstester committed Nov 6, 2023
2 parents 9b31c33 + 459866e commit 1e895d1
Show file tree
Hide file tree
Showing 5 changed files with 95 additions and 1 deletion.
48 changes: 48 additions & 0 deletions gcc/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,51 @@
2023-11-05 Uros Bizjak <[email protected]>

* config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
* config/i386/constraints.md ("R"): Update for rename.

2023-11-05 Richard Sandiford <[email protected]>

* mode-switching.cc: Remove unused forward references.
(seginfo): Remove bbnum.
(new_seginfo): Remove associated argument.
(optimize_mode_switching): Update calls accordingly.

2023-11-05 Richard Sandiford <[email protected]>

* read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
invalid [...] operands.

2023-11-05 Richard Sandiford <[email protected]>

PR target/112105
* config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
function, with the core logic extracted from...
(aarch64_can_change_mode_class): ...here. Extend the previous rules
to allow changes between partial SVE modes and other modes if
the other mode is no bigger than an element, and if no other rule
prevents it. Use the aarch64_modes_tieable_p handling of
partial Advanced SIMD structure modes.
(aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
Allow all vector mode ties that it allows.

2023-11-05 Pan Li <[email protected]>

* config/riscv/autovec.md: Remove the size check of lrint.
* config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
emit func impl.
(emit_vec_widden_cvt_x_f): New help emit func impl.
(emit_vec_rounding_to_integer): New func impl to emit the
rounding from FP to integer.
(expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
* config/riscv/vector.md: Take V_VLSF for vfncvt.

2023-11-05 Juzhe-Zhong <[email protected]>

* config/riscv/vector.md: Fix bug.

2023-11-04 Sergei Trofimovich <[email protected]>

PR bootstrap/112379
Expand Down
2 changes: 1 addition & 1 deletion gcc/DATESTAMP
Original file line number Diff line number Diff line change
@@ -1 +1 @@
20231105
20231106
7 changes: 7 additions & 0 deletions gcc/c-family/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,10 @@
2023-11-05 Jakub Jelinek <[email protected]>

* c-lex.cc (c_common_has_attribute): Return 1 for omp::directive
and omp::sequence with -fopenmp or -fopenmp-simd also for C, not
just for C++. Return 1 for omp::decl with -fopenmp or -fopenmp-simd
for both C and C++.

2023-11-04 David Malcolm <[email protected]>

* c-pragma.cc:: (handle_pragma_push_options): Fix missing "GCC" in
Expand Down
34 changes: 34 additions & 0 deletions gcc/testsuite/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,37 @@
2023-11-05 Francois-Xavier Coudert <[email protected]>

* gcc.target/i386/pr111753.c: Require dfp.

2023-11-05 Jakub Jelinek <[email protected]>

* c-c++-common/gomp/attrs-1.c: Adjust for omp::directive and
omp::sequence being supported also in C and add tests for omp::decl.
* c-c++-common/gomp/attrs-2.c: Likewise.
* c-c++-common/gomp/attrs-3.c: Add tests for omp::decl.

2023-11-05 Richard Sandiford <[email protected]>

PR target/112105
* gcc.target/aarch64/pr112105.c: New test.
* gcc.target/aarch64/sve/pcs/struct_3_128.c: Expect a 32-bit spill
rather than a 16-bit spill.

2023-11-05 Pan Li <[email protected]>

* gcc.target/riscv/rvv/autovec/unop/math-irint-run-0.c:
* gcc.target/riscv/rvv/autovec/unop/math-irint-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-irintf-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-llrintf-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-llrintf-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-rv32-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-rv32-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrintf-rv64-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-lrintf-rv64-run-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-irint-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c: New test.

2023-11-04 Jakub Jelinek <[email protected]>

* gcc.dg/gomp/attrs-19.c: New test.
Expand Down
5 changes: 5 additions & 0 deletions libgomp/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,8 @@
2023-11-05 Jakub Jelinek <[email protected]>

* libgomp.texi (Enabling OpenMP): Adjust wording for attribute syntax
supported also in C.

2023-10-31 Thomas Schwinge <[email protected]>

* testsuite/libgomp.oacc-c-c++-common/deep-copy-8.c: Add OpenACC
Expand Down

0 comments on commit 1e895d1

Please sign in to comment.