Merge branch 'main' into srj/py-float32

halide · Sep 17, 2024 · c3b05fc · c3b05fc
2 parents 7b8308f + c8dcb4c
commit c3b05fc
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Showing 2 changed files with 9 additions and 2 deletions.
diff --git a/src/LLVM_Headers.h b/src/LLVM_Headers.h
@@ -85,7 +85,9 @@
 #include <llvm/Transforms/IPO.h>
 #include <llvm/Transforms/IPO/AlwaysInliner.h>
 #include <llvm/Transforms/IPO/Inliner.h>
+#if LLVM_VERSION < 200
 #include <llvm/Transforms/Instrumentation.h>
+#endif
 #include <llvm/Transforms/Instrumentation/AddressSanitizer.h>
 #include <llvm/Transforms/Instrumentation/SanitizerCoverage.h>
 #include <llvm/Transforms/Instrumentation/ThreadSanitizer.h>

diff --git a/test/correctness/simd_op_check_sve2.cpp b/test/correctness/simd_op_check_sve2.cpp
@@ -643,8 +643,13 @@ class SimdOpCheckArmSve : public SimdOpCheckTest {
                 // No corresponding instructions exists for is_nan, is_inf, is_finite.
                 // The instructions expected to be generated depends on CodeGen_LLVM::visit(const Call *op)
                 add_arm64("nan", is_vector ? sel_op("", "fcmge", "fcmuo") : "fcmp", is_nan(f_1));
-                add_arm64("inf", {{"fabs", bits, force_vectorized_lanes}}, vf, is_inf(f_1));
-                add_arm64("finite", {{"fabs", bits, force_vectorized_lanes}}, vf, is_inf(f_1));
+                if (Halide::Internal::get_llvm_version() >= 200) {
+                    add_arm64("inf", is_vector ? sel_op("", "fcmge", "fcmeq") : "", is_inf(f_1));
+                    add_arm64("finite", is_vector ? sel_op("", "fcmge", "fcmeq") : "", is_inf(f_1));
+                } else {
+                    add_arm64("inf", {{"fabs", bits, force_vectorized_lanes}}, vf, is_inf(f_1));
+                    add_arm64("finite", {{"fabs", bits, force_vectorized_lanes}}, vf, is_inf(f_1));
+                }
             }
 
             if (bits == 16) {