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target/riscv: reset delays during batch scans
This commit is related to testing how OpenOCD responds to `dmi.busy`. Consider testing on Spike (e.g. `riscv-tests/debug` testsuite). Spike returns `dmi.busy` if there were less then a given number of RTI cycles (`required_rti_cycles`) between DR_UPDATE and DR_CAPTURE: https://github.com/riscv-software-src/riscv-isa-sim/blob/master/riscv/jtag_dtm.cc#L145 https://github.com/riscv-software-src/riscv-isa-sim/blob/master/riscv/jtag_dtm.cc#L202 `required_rti_cycles` gets it's value from `--dmi-rti` CLI argument and is constant throughout the run. OpenOCD learns this required number of RTI cycles by starting with zero and increasing it if `dmi.busy` is encountered. So the required number of RTI cycles is learned during the first DMI access in the `examine()`. To induce `dmi.busy` on demand `riscv reset_delays <x>` command is provided. This command initializes `riscv_info::reset_delays_wait` counter to the provided `<x>` value. The counter is decreased before a DMI access and when it reaches zero the learned value of RTI cycles required is reset, so the DMI access results in `dmi.busy`. Now consider running a batch of accesses. Before the change all the accesses in the batch had the same number of RIT cycles in between them. So either: * Number of accesses in the batch was greater then the value of `riscv_info::reset_delays_wait` counter and there was no `dmi.busy` throughout the batch. * Number of accesses in the batch was less or equal then the value of `riscv_info::reset_delays_wait` counter and the first access of the batch resulted in `dmi.busy`. Therefore it was impossible to encounter `dmi.busy` on any scan of the batch except the first one. Change-Id: Ib0714ecaf7d2e11878140d16d9aa6152ff20f1e9 Signed-off-by: Evgeniy Naydanov <[email protected]>
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