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Fix PC relative disponents.
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The ISA sign extends disponents values of 8, 15 and 24 bits.
For address disponents it also shifts the results by 2 for alignment.

The ISA has two writing styles for this though:
sign_ext(dispXX * 2) and sign_ext(dispXX) * 2.

Assuming that sign_ext() always works on the MSB of the value
they are eqivalent. Because:
sign_ext(disp8 * 2) = sign_ext(disp8 * 2 = disp9) = sign_ext(disp9) = sign_ext(disp8) * 2.

This let to confusion before and for the sign_ext(dispXX * 2) case,
and the wrong bit was checked for sign extension (e.g bit 8 for an effective disp9 value).
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@Rot127
Rot127 committed Oct 15, 2024
1 parent 0dc6d70 commit 9137fa8
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Showing 3 changed files with 83 additions and 16 deletions.
21 changes: 10 additions & 11 deletions arch/TriCore/TriCoreInstPrinter.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -255,10 +255,8 @@ static void printOff18Imm(MCInst *MI, int OpNum, SStream *O)
printOperand(MI, OpNum, O);
}

// PC + sext(2 * disp)
#define DISP1(N) ((int64_t)(MI->address) + SignExtend64(disp * 2, N))
// PC + sext(disp) * 2
#define DISP2(N) ((int64_t)(MI->address) + SignExtend64(disp, N) * 2)
#define DISP_SEXT_2ALIGN(N) ((int64_t)(MI->address) + SignExtend64(disp, N) * 2)

static void printDisp24Imm(MCInst *MI, int OpNum, SStream *O)
{
Expand All @@ -269,19 +267,20 @@ static void printDisp24Imm(MCInst *MI, int OpNum, SStream *O)
switch (MCInst_getOpcode(MI)) {
case TRICORE_CALL_b:
case TRICORE_FCALL_b: {
res = DISP1(24);
res = DISP_SEXT_2ALIGN(24);
break;
}
case TRICORE_CALLA_b:
case TRICORE_FCALLA_b:
case TRICORE_JA_b:
case TRICORE_JLA_b:
// = {disp24[23:20], 7’b0000000, disp24[19:0], 1’b0};
res = disp << 1;
// {disp24[23:20], 7’b0000000, disp24[19:0], 1’b0}
res = ((disp & 0xf00000ULL) << 8) |
((disp & 0xfffffULL) << 1);
break;
case TRICORE_J_b:
case TRICORE_JL_b:
res = DISP2(24);
res = DISP_SEXT_2ALIGN(24);
break;
}

Expand All @@ -300,7 +299,7 @@ static void printDisp15Imm(MCInst *MI, int OpNum, SStream *O)
switch (MCInst_getOpcode(MI)) {
case TRICORE_LOOP_brr:
case TRICORE_LOOPU_brr:
res = DISP1(15);
res = DISP_SEXT_2ALIGN(15);
break;
case TRICORE_JEQ_brc:
case TRICORE_JEQ_brr:
Expand All @@ -324,7 +323,7 @@ static void printDisp15Imm(MCInst *MI, int OpNum, SStream *O)
case TRICORE_JNZ_T_brn:
case TRICORE_JZ_A_brr:
case TRICORE_JZ_T_brn:
res = DISP2(15);
res = DISP_SEXT_2ALIGN(15);
break;
default:
// handle other cases, if any
Expand All @@ -345,12 +344,12 @@ static void printDisp8Imm(MCInst *MI, int OpNum, SStream *O)
int64_t res = 0;
switch (MCInst_getOpcode(MI)) {
case TRICORE_CALL_sb:
res = DISP1(8);
res = DISP_SEXT_2ALIGN(8);
break;
case TRICORE_J_sb:
case TRICORE_JNZ_sb:
case TRICORE_JZ_sb:
res = DISP2(8);
res = DISP_SEXT_2ALIGN(8);
break;
default:
// handle other cases, if any
Expand Down
10 changes: 5 additions & 5 deletions tests/MC/TriCore/ADC_Queued_Scan_1_KIT_TC397_TFT.s.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -574,7 +574,7 @@ test_cases:
expected:
insns:
-
asm_text: "call #0x7023e8"
asm_text: "call #0xff7023e8"
-
input:
bytes: [ 0x91, 0x00, 0x03, 0xfa ]
Expand Down Expand Up @@ -1114,7 +1114,7 @@ test_cases:
expected:
insns:
-
asm_text: "call #0x702300"
asm_text: "call #0xff702300"
-
input:
bytes: [ 0x15, 0xd0, 0xc0, 0xeb ]
Expand Down Expand Up @@ -1420,7 +1420,7 @@ test_cases:
expected:
insns:
-
asm_text: "call #0x402300"
asm_text: "call #0xff402300"
-
input:
bytes: [ 0x3b, 0x00, 0x00, 0xf3 ]
Expand Down Expand Up @@ -5047,7 +5047,7 @@ test_cases:
expected:
insns:
-
asm_text: "call #0x4023e8"
asm_text: "call #0xff4023e8"
-
input:
bytes: [ 0x49, 0xff, 0x0c, 0x0a ]
Expand Down Expand Up @@ -7972,7 +7972,7 @@ test_cases:
expected:
insns:
-
asm_text: "call #0x102300"
asm_text: "call #0xff102300"
-
input:
bytes: [ 0xda, 0x05 ]
Expand Down
68 changes: 68 additions & 0 deletions tests/issues/issues.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5438,3 +5438,71 @@ test_cases:
writeback: 1
regs_read: [ x0 ]
regs_write: [ x0, x1 ]
-
input:
name: "TriCore EA calculation with disponent - #2504"
bytes: [ 0xfd,0xc0,0xe2,0x48,
0xdd,0x8a,0x2b,0x53,
0xdd,0x97,0x3e,0x94,
0xdd,0xd6,0x4d,0x85,
0x9d,0xcb,0x01,0x42,
0x9d,0x56,0xce,0x04,
0x9d,0xce,0x71,0x03,
0xe1,0xec,0xe3,0xb1,
0xe1,0x23,0xf7,0x37,
0xe1,0xa1,0x33,0xf7,
0xed,0xec,0xe3,0xb1,
0xed,0x23,0xf7,0x37,
0x6d,0x90,0xa7,0x8e,
0xed,0xa1,0x33,0xf7,
0x6d,0xb7,0xe0,0xba,
0x1b,0x00,0x30,0x00,
0x5c,0x56,
0x5c,0x97,
0x5c,0xc4,
0x5c,0xcd ]
arch: "CS_ARCH_TRICORE"
options: [ CS_OPT_DETAIL, CS_MODE_TRICORE_162 ]
address: 0x80000000
expected:
insns:
-
asm_text: "loop a12, #0x7fff91c4"
-
asm_text: "jla #0x8014a656"
-
asm_text: "jla #0x900f287c"
-
asm_text: "jla #0xd00d0a9a"
-
asm_text: "ja #0xc0168402"
-
asm_text: "ja #0x500c099c"
-
asm_text: "ja #0xc01c06e2"
-
asm_text: "fcalla #0xe01963c6"
-
asm_text: "fcalla #0x20066fee"
-
asm_text: "fcalla #0xa003ee66"
-
asm_text: "calla #0xe01963c6"
-
asm_text: "calla #0x20066fee"
-
asm_text: "call #0x7f211d7e"
-
asm_text: "calla #0xa003ee66"
-
asm_text: "call #0x7f6f75f8"
-
asm_text: "addi d0, d0, #0x300"
-
asm_text: "call #0x800000ec"
-
asm_text: "call #0x7fffff70"
-
asm_text: "call #0x7fffffcc"
-
asm_text: "call #0x7fffffe0"

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