Welcome to our VLSI Fundamentals: A Practical Approach Education Kit!
Our flagship offering to universities worldwide is the Arm University Program Education Kit series.
These self-contained educational materials are offered exclusively and at no cost to academics and teaching staff worldwide. They’re designed to support your day-to-day teaching on core electronic engineering and computer science subjects. You have the freedom to choose which modules to teach – you can use all the modules in the Education Kit or only those that are most appropriate to your teaching outcomes.
VLSI Fundamentals: A Practical Approach Education Kit covers the fundamentals of Very Large-Scale Integration (VLSI) design, including how the theories and concepts can be applied in the design of simple logic circuits and in the physical implementation of a simplified microprocessor. A full description of the education kit can be found here.
- A full set of 20 modules with lecture slides and lab exercises (in selected modules) ready for use in a typical 10-12-week undergraduate course (full syllabus below).
- Lab manuals include additional libraries for lab exercises and solutions for faculty.
- Prerequisites: Students are required to have an understanding of digital electronics and the basics of hardware description language (Verilog).
To produce students with solid introductory knowledge on VLSI concepts and application of these concepts in simulation, verification, and physical implementation of a simplified microprocessor using standard industry tools.
- Cadence Virtuoso for schematic capture and layout editing.
- Cadence NCSim (Incisive) for simulation.
- Synopsys Design Compiler for Synthesis.
- Cadence SoC Encounter for PnR.
Please note, the Cadence Innovus tool can be used instead of the older tool Cadence SoC Encounter for PnR.
An all Cadence tools version of this course can be found here.
- Introduction
- Circuits and Layout
- Simple Processor Example
- CMOS Transistor Theory
- Nonideal Transistor Theory
- DC & Transient Response
- Logical Effort
- Power
- Scaling
- SPICE Simulation
- Combinational Circuit Design
- Sequential Circuit Design
- Wires
- Adders
- Datapath Functional Units
- SRAM
- Clocking
- Variation and Reliability
- Test
- Packaging, I/O & Power Distribution
You are free to fork or clone this material. See LICENSE.md for the complete license. All relevant lab files are provided and used with permission from the following authors:
- Prof. David Harris
- Prof. Erik Brunvand
Arm is committed to making the language we use inclusive, meaningful, and respectful. Our goal is to remove and replace non-inclusive language from our vocabulary to reflect our values and represent our global ecosystem.
Arm is working actively with our partners, standards bodies, and the wider ecosystem to adopt a consistent approach to the use of inclusive language and to eradicate and replace offensive terms. We recognise that this will take time. This course has been updated to replace references to non-inclusive language. We recognise that some of you will be accustomed to using the previous terms and may not immediately recognise their replacements. Please refer to the following example:
- When introducing edge-triggered Flip-Flops, we will use the term ‘JK Flip-flop’ instead of ‘master-slave flip-flop’.
This course may still contain other references to non-inclusive language; it will be updated with newer terms as those terms are agreed and ratified with the wider community.
Contact us at [email protected] with questions or comments about this course. You can also report non-inclusive and offensive terminology usage in Arm content at [email protected].