SVE Implementation for Level-1 BLAS Routines #4959
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updated KERNEL.ARMV8SVE for level 1 sve (swap, rot and scal) kernels.
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Hiya, have you tested the impact on Graviton 3/4? |
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Thank you very much for this revised PR, I'm looking forward to the HPEC2024 proceedings becoming available. |
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| static int rot_kernel_sve(BLASLONG n, FLOAT *x, FLOAT *y, FLOAT c, FLOAT s) | ||
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| for (int i = 0; i < n; i += SVE_WIDTH) |
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can you make i a BLASLONG here please, and adjust the casts in the SVE_WHILELT to uint64_t accordingly ?
| #define SVE_WIDTH svcntw() | ||
| #endif | ||
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| static int scal_kernel_sve(int n, FLOAT *x, FLOAT da) |
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| static int scal_kernel_sve(int n, FLOAT *x, FLOAT da) | ||
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| for (int i = 0; i < n; i += SVE_WIDTH) |
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make i a BLASLONG here too, please
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| for (int i = 0; i < n; i += SVE_WIDTH) | ||
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| svbool_t pg = SVE_WHILELT(i, n); |
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add uint64_t casts for i and n here please
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please see kernel/arm/scal.c for letting "dummy2" decide whether to propagate NaN and Inf values - probably there is a more elegant solution than what I put there, otherwise just copy that file
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| svbool_t pg = SVE_WHILELT(i, n); | ||
| SVE_TYPE x_vec = svld1(pg, &x[i]); | ||
| SVE_TYPE result = svmul_z(pg, x_vec, da); |
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I'm actually unsure here if svmul_z will "do the right thing" concerning NaN or Inf arguments in x_vec or da
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Thank You @martin-frbg for suggestions. we will do the required modifications. |
We have optimized Level-1 BLAS routines (scal, swap, and rot) utilizing ARM SVE, resulting in significant performance enhancements in OpenBLAS on two variants of the A64FX—FUJITSU PRIMEHPC FX700 and the FUGAKU supercomputer. These optimizations achieved performance improvements ranging from 1.80x to 4x through effective code vectorization. This research has been accepted as a full paper and presented at the 28th Annual IEEE High Performance Extreme Computing (HPEC) Conference in September 2024, under the title "Optimization Strategies to Accelerate BLAS Operations with ARM SVE."