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Msi ms7d25/dtbt support #386

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83 changes: 83 additions & 0 deletions src/acpi/device.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,27 @@
#define ACPI_DP_UUID "daffd814-6eba-4d8c-8a91-bc9bbf4aa301"
#define ACPI_DP_CHILD_UUID "dbb8e3e6-5886-4ba6-8795-1319f52a966b"

/*
* Below properties are defined at
* https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports
*/
#define ACPI_DSD_EXTERNAL_FACING_PORT_UUID "EFCC06CC-73AC-4BC3-BFF0-76143807C389"
#define ACPI_DSD_EXTERNAL_FACING_PORT_NAME "ExternalFacingPort"

#define ACPI_DSD_HOTPLUG_IN_D3_UUID "6211E2C0-58A3-4AF3-90E1-927A4E0C55A4"
#define ACPI_DSD_HOTPLUG_IN_D3_NAME "HotPlugSupportInD3"

/* ID for the DmaProperty _DSD */
#define ACPI_DSD_DMA_PROPERTY_UUID "70D24161-6DD5-4C9E-8070-705531292865"
#define ACPI_DSD_DMA_PROPERTY_NAME "DmaProperty"

/*
* Below properties are defined at
* https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/power-management-for-storage-hardware-devices-intro
*/
#define ACPI_DSD_STORAGE_D3_UUID "5025030F-842F-4AB4-A561-99A5189762D0"
#define ACPI_DSD_STORAGE_D3_NAME "StorageD3Enable"

/* Write empty word value and return pointer to it */
static void *acpi_device_write_zero_len(void)
{
Expand Down Expand Up @@ -1183,3 +1204,65 @@ void acpi_device_write_pci_dev(const struct device *dev)
acpigen_pop_len(); /* Device */
acpigen_pop_len(); /* Scope */
}


/*
* Helper function to add given integer property with an UUID to _DSD in the current scope.
*
* dsd - Pointer to a _DSD object.
* Append to existing _DSD object if not NULL.
* Create new _DSD object and flush it if NULL.
* uuid - Pointer to the UUID string.
* name - Pointer to the property name string.
* value - Value of the integer property.
*/
static void acpi_device_add_integer_property_with_uuid(struct acpi_dp *dsd,
const char *uuid,
const char *name,
uint64_t value)
{
struct acpi_dp *prev_dsd = dsd, *pkg;
if (prev_dsd == NULL)
dsd = acpi_dp_new_table("_DSD");
pkg = acpi_dp_new_table(uuid);
acpi_dp_add_integer(pkg, name, value);
acpi_dp_add_package(dsd, pkg);
if (prev_dsd == NULL)
acpi_dp_write(dsd);
}

/* _DSD with ExternalFacingPort */
void acpi_device_add_external_facing_port(struct acpi_dp *dsd)
{
acpi_device_add_integer_property_with_uuid(dsd,
ACPI_DSD_EXTERNAL_FACING_PORT_UUID,
ACPI_DSD_EXTERNAL_FACING_PORT_NAME,
1);
}

/* _DSD with HotPlugSupportInD3 */
void acpi_device_add_hotplug_support_in_d3(struct acpi_dp *dsd)
{
acpi_device_add_integer_property_with_uuid(dsd,
ACPI_DSD_HOTPLUG_IN_D3_UUID,
ACPI_DSD_HOTPLUG_IN_D3_NAME,
1);
}

/* _DSD with DmaProperty */
void acpi_device_add_dma_property(struct acpi_dp *dsd)
{
acpi_device_add_integer_property_with_uuid(dsd,
ACPI_DSD_DMA_PROPERTY_UUID,
ACPI_DSD_DMA_PROPERTY_NAME,
1);
}

/* _DSD with StorageD3Enable */
void acpi_device_add_storage_d3_enable(struct acpi_dp *dsd)
{
acpi_device_add_integer_property_with_uuid(dsd,
ACPI_DSD_STORAGE_D3_UUID,
ACPI_DSD_STORAGE_D3_NAME,
1);
}
30 changes: 30 additions & 0 deletions src/drivers/intel/dtbt/Kconfig
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
config DRIVERS_INTEL_DTBT
def_bool n
help
Support for discrete Thunderbolt controllers


if !PCIEXP_HOTPLUG

config PCIEXP_HOTPLUG_BUSES
int
default 42

config PCIEXP_HOTPLUG_MEM
hex
default 0xc200000

config PCIEXP_HOTPLUG_PREFETCH_MEM
hex
default 0x1c000000

config PCIEXP_HOTPLUG_IO
hex
default 0x1000

config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G
bool
depends on RESOURCE_ALLOCATOR_V4
default y

endif
3 changes: 3 additions & 0 deletions src/drivers/intel/dtbt/Makefile.inc
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only

ramstage-$(CONFIG_DRIVERS_INTEL_DTBT) += dtbt.c
8 changes: 8 additions & 0 deletions src/drivers/intel/dtbt/chip.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#ifndef _DRIVERS_INTEL_DTBT_CHIP_H_
#define _DRIVERS_INTEL_DTBT_CHIP_H_

struct drivers_intel_dtbt_config {};

#endif /* _DRIVERS_INTEL_DTBT_CHIP_H_ */
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