From f6616f4c5645cdd70178a6c18bed38dd767c4620 Mon Sep 17 00:00:00 2001
From: Krzysztof Taborowski <krzysztof.taborowski@nordicsemi.no>
Date: Thu, 26 Sep 2024 11:19:08 +0200
Subject: [PATCH] tests: add nrf54dk to spi bus

to be squashed

Signed-off-by: Krzysztof Taborowski <krzysztof.taborowski@nordicsemi.no>
---
 .../boards/nrf54l15dk_nrf54l15_cpuapp.overlay | 72 +++++++++++++++++++
 1 file changed, 72 insertions(+)
 create mode 100644 tests/functional/spi_bus/boards/nrf54l15dk_nrf54l15_cpuapp.overlay

diff --git a/tests/functional/spi_bus/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/tests/functional/spi_bus/boards/nrf54l15dk_nrf54l15_cpuapp.overlay
new file mode 100644
index 0000000000..33caec970d
--- /dev/null
+++ b/tests/functional/spi_bus/boards/nrf54l15dk_nrf54l15_cpuapp.overlay
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+
+ &pinctrl {
+	spi21_default: spi21_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
+				<NRF_PSEL(SPIM_MISO, 1, 11)>,
+				<NRF_PSEL(SPIM_MOSI, 2, 8)>;
+		};
+	};
+
+	spi21_sleep: spi21_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
+				<NRF_PSEL(SPIM_MISO, 1, 11)>,
+				<NRF_PSEL(SPIM_MOSI, 2, 8)>;
+			low-power-enable;
+		};
+	};
+};
+
+ sid_semtech: &spi21 {
+	compatible = "nordic,nrf-spim";
+	status = "okay";
+	pinctrl-0 = <&spi21_default>;
+	pinctrl-1 = <&spi21_sleep>;
+	pinctrl-names = "default", "sleep";
+	clock-frequency = <DT_FREQ_M(8)>;
+};
+
+/{
+	semtech_sx1262_gpios{
+		compatible = "gpio-keys";
+		semtech_sx1262_cs: cs {
+			gpios = <&gpio2 0xa GPIO_PULL_UP>;
+			label = "semtech_sx1262 CS";
+		};
+		semtech_sx1262_reset_gpios: reset {
+			gpios = <&gpio0 0x2 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
+			label = "semtech_sx1262 Reset";
+		};
+		semtech_sx1262_busy_gpios: busy {
+			gpios = <&gpio0 0x0 0x0>;
+			label = "semtech_sx1262 Busy";
+		};
+		semtech_sx1262_antenna_enable_gpios: antena_enable {
+			gpios = <&gpio0 0x1 0x0>;
+			label = "semtech_sx1262 Antena Enable";
+		};
+		semtech_sx1262_dio1_gpios: dio1 {
+			gpios = <&gpio0 0x3  0x0>;
+			label = "semtech_sx1262 DIO1";
+		};
+	};	
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};