From 87deede7ee1d52b329bbc6c9abebab4a71c36a92 Mon Sep 17 00:00:00 2001 From: Krzysztof Taborowski Date: Wed, 6 Nov 2024 09:41:17 +0100 Subject: [PATCH] samples: support for nrf54l15 with tfm [KRKNWK-19489] Fix faults after application start. Align mfg address with non tfm variant. Disable logs in tf-m, pins are needed for Semtech. Signed-off-by: Krzysztof Taborowski --- .../boards/nrf54l15dk_nrf54l15_cpuapp_ns.conf | 7 + .../nrf54l15dk_nrf54l15_cpuapp_ns.overlay | 95 +++++--- ...m_static_nrf54l15dk_nrf54l15_cpuapp_ns.yml | 207 +++++++++--------- samples/sid_end_device/sample.yaml | 4 +- 4 files changed, 172 insertions(+), 141 deletions(-) diff --git a/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.conf b/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.conf index 913d997294..f46f9a650b 100644 --- a/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.conf +++ b/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.conf @@ -7,8 +7,15 @@ # Multirole is the only currently supported role by SoftDevice. CONFIG_BT_LL_SOFTDEVICE_MULTIROLE=y +# nRF54L15 requires bigger stack sizes than nRF52/nRF53 families +CONFIG_MPSL_WORK_STACK_SIZE=2048 + # Not supported for 54L15 _NS CONFIG_FPROTECT=n # Set the ZMS sector count to match the settings partition size that is 40 kB for this application. CONFIG_SETTINGS_ZMS_SECTOR_COUNT=10 + +# Disable tf-m uart to reuse pins for semtech +CONFIG_TFM_LOG_LEVEL_SILENCE=y +CONFIG_TFM_SECURE_UART=n diff --git a/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.overlay b/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.overlay index 550ed7eb67..baf527fc41 100644 --- a/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.overlay +++ b/samples/sid_end_device/boards/nrf54l15dk_nrf54l15_cpuapp_ns.overlay @@ -4,36 +4,7 @@ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause */ -&pinctrl { - spi21_default: spi21_default { - group1 { - psels = , - , - ; - }; - }; - - spi21_sleep: spi21_sleep { - group1 { - psels = , - , - ; - low-power-enable; - }; - }; -}; - - sid_semtech: &spi21 { - compatible = "nordic,nrf-spim"; - status = "okay"; - cs-gpios = <&gpio2 0xa GPIO_PULL_UP>; - pinctrl-0 = <&spi21_default>; - pinctrl-1 = <&spi21_sleep>; - pinctrl-names = "default", "sleep"; - clock-frequency = ; -}; - -/{ + /{ aliases { state-notifier-connected = &led0; state-notifier-time-sync = &led1; @@ -44,25 +15,34 @@ semtech_sx1262_gpios{ compatible = "gpio-keys"; semtech_sx1262_reset_gpios: reset { - gpios = <&gpio0 0x2 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>; + gpios = <&gpio2 8 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>; label = "semtech_sx1262 Reset"; }; semtech_sx1262_busy_gpios: busy { - gpios = <&gpio0 0x0 0x0>; + gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH)>; label = "semtech_sx1262 Busy"; }; semtech_sx1262_antenna_enable_gpios: antena_enable { - gpios = <&gpio0 0x1 0x0>; + gpios = <&gpio2 10 (GPIO_ACTIVE_HIGH)>; label = "semtech_sx1262 Antena Enable"; }; semtech_sx1262_dio1_gpios: dio1 { - gpios = <&gpio0 0x3 0x0>; + gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH|GPIO_PULL_DOWN)>; label = "semtech_sx1262 DIO1"; }; - }; + }; +}; + +sid_semtech: &spi30 { + compatible = "nordic,nrf-spim"; + status = "okay"; + cs-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&spi30_default_alt>; + pinctrl-1 = <&spi30_sleep_alt>; + pinctrl-names = "default", "sleep"; + clock-frequency = ; }; -// restore full RRAM and SRAM space - by default some parts are dedicated to FLRP &cpuapp_rram { reg = <0x0 DT_SIZE_K(1524)>; }; @@ -72,6 +52,49 @@ ranges = <0x0 0x20000000 0x40000>; }; +&pinctrl { + spi30_default_alt: spi30_default_alt { + group1 { + psels = , + , + ; + }; + }; + + spi30_sleep_alt: spi30_sleep_alt { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; +}; + +&adc { + status = "disabled"; +}; +&uart21 { + status = "disabled"; +}; +&pwm20 { + status = "disabled"; +}; +&i2c20 { + status = "disabled"; +}; +&spi20 { + status = "disabled"; +}; +&spi22 { + status = "disabled"; +}; + +// TODO: re-enable HWFC once it's fixed +&uart20 { + /delete-property/ hw-flow-control; +}; + // Change IRQ ids to handle button interrupts. diff --git a/samples/sid_end_device/pm_static_nrf54l15dk_nrf54l15_cpuapp_ns.yml b/samples/sid_end_device/pm_static_nrf54l15dk_nrf54l15_cpuapp_ns.yml index 44a52be75c..60a18c5c1c 100644 --- a/samples/sid_end_device/pm_static_nrf54l15dk_nrf54l15_cpuapp_ns.yml +++ b/samples/sid_end_device/pm_static_nrf54l15dk_nrf54l15_cpuapp_ns.yml @@ -1,52 +1,94 @@ -mfg_storage: - address: 0x17a000 - end_address: 0x17b000 - placement: - after: - - mcuboot_secondary - region: flash_primary - size: 0x1000 -app: - address: 0x54000 - end_address: 0xc7000 - region: flash_primary - size: 0x73000 mcuboot: address: 0x0 end_address: 0xc000 placement: + align: + end: 0x1000 before: - - tfm_its + - mcuboot_primary region: flash_primary size: 0xc000 -mcuboot_pad: - address: 0x14000 - end_address: 0x14800 +tfm_storage: + address: 0xc000 + end_address: 0x14000 + span: + - tfm_ps + - tfm_its + - tfm_otp_nv_counters + region: flash_primary + size: 0x8000 +tfm: + address: 0x14800 + end_address: 0x34000 + inside: + - mcuboot_primary_app placement: before: - - mcuboot_primary_app + - app region: flash_primary - size: 0x800 + size: 0x1f800 +app: + address: 0x34000 + end_address: 0xc7000 + region: flash_primary + size: 0x93000 +nonsecure_storage: + address: 0x17a000 + end_address: 0x17d000 + span: + - settings_storage + - mfg_storage + region: flash_primary + size: 0x2000 +settings_storage: + address: 0x17a000 + end_address: 0x17c000 + inside: + - nonsecure_storage + placement: + after: + - app + align: + start: 0x1000 + before: + - end + region: flash_primary + size: 0x2000 +mfg_storage: + address: 0x17c000 + end_address: 0x17d000 + inside: + - nonsecure_storage + region: flash_primary + size: 0x1000 + +# MCUBoot mcuboot_primary: address: 0x14000 end_address: 0xc7000 - orig_span: &id001 + span: - mcuboot_pad - - tfm - app + - tfm region: flash_primary sharers: 0x1 size: 0xb3000 - span: *id001 +mcuboot_pad: + address: 0x14000 + end_address: 0x14800 + placement: + before: + - mcuboot_primary_app + region: flash_primary + size: 0x800 mcuboot_primary_app: address: 0x14800 end_address: 0xc7000 - orig_span: &id002 + span: - app - tfm region: flash_primary size: 0xb2800 - span: *id002 mcuboot_secondary: address: 0xc7000 end_address: 0x17a000 @@ -59,67 +101,63 @@ mcuboot_secondary: share_size: - mcuboot_primary size: 0xb3000 -mcuboot_sram: + +# RAM +sram_secure: address: 0x20000000 end_address: 0x20013000 - orig_span: &id003 + span: - tfm_sram region: sram_primary size: 0x13000 - span: *id003 -nonsecure_storage: - address: 0x17b000 - end_address: 0x17d000 - orig_span: &id004 - - settings_storage - region: flash_primary - size: 0x2000 - span: *id004 -settings_storage: - address: 0x17b000 - end_address: 0x17d000 - inside: - - nonsecure_storage - placement: - after: - - app - align: - start: 0x1000 - before: - - end - region: flash_primary - size: 0x2000 sram_nonsecure: address: 0x20013000 end_address: 0x20040000 - orig_span: &id005 + span: - sram_primary region: sram_primary size: 0x2d000 - span: *id005 -sram_primary: - address: 0x20013000 - end_address: 0x20040000 - region: sram_primary - size: 0x2d000 -sram_secure: + +mcuboot_sram: address: 0x20000000 end_address: 0x20013000 - orig_span: &id006 + span: - tfm_sram region: sram_primary size: 0x13000 - span: *id006 -tfm: - address: 0x14800 - end_address: 0x54000 +tfm_sram: + address: 0x20000000 + end_address: 0x20013000 inside: - - mcuboot_primary_app + - sram_secure placement: - before: - - app + after: + - start + region: sram_primary + size: 0x13000 +sram_primary: + address: 0x20013000 + end_address: 0x20040000 + region: sram_primary + size: 0x2d000 + +# TFM +tfm_secure: + address: 0x14000 + end_address: 0x34000 + span: + - mcuboot_pad + - tfm + region: flash_primary + size: 0x20000 +tfm_nonsecure: + address: 0x34000 + end_address: 0xc7000 + span: + - app region: flash_primary - size: 0x3f800 + size: 0x93000 + tfm_its: address: 0xc000 end_address: 0xe000 @@ -130,14 +168,6 @@ tfm_its: - tfm_otp_nv_counters region: flash_primary size: 0x2000 -tfm_nonsecure: - address: 0x54000 - end_address: 0xc7000 - orig_span: &id007 - - app - region: flash_primary - size: 0x73000 - span: *id007 tfm_otp_nv_counters: address: 0xe000 end_address: 0x10000 @@ -158,32 +188,3 @@ tfm_ps: - mcuboot_primary region: flash_primary size: 0x4000 -tfm_secure: - address: 0x14000 - end_address: 0x54000 - orig_span: &id008 - - mcuboot_pad - - tfm - region: flash_primary - size: 0x40000 - span: *id008 -tfm_sram: - address: 0x20000000 - end_address: 0x20013000 - inside: - - sram_secure - placement: - after: - - start - region: sram_primary - size: 0x13000 -tfm_storage: - address: 0xc000 - end_address: 0x14000 - orig_span: &id009 - - tfm_ps - - tfm_its - - tfm_otp_nv_counters - region: flash_primary - size: 0x8000 - span: *id009 diff --git a/samples/sid_end_device/sample.yaml b/samples/sid_end_device/sample.yaml index cee615035f..05845cf93e 100644 --- a/samples/sid_end_device/sample.yaml +++ b/samples/sid_end_device/sample.yaml @@ -8,14 +8,14 @@ common: - nrf52840dk/nrf52840 - nrf5340dk/nrf5340/cpuapp - nrf54l15dk/nrf54l15/cpuapp + - nrf54l15dk/nrf54l15/cpuapp/ns integration_platforms: - nrf52840dk/nrf52840 - nrf5340dk/nrf5340/cpuapp - nrf54l15dk/nrf54l15/cpuapp + - nrf54l15dk/nrf54l15/cpuapp/ns tests: sample.sidewalk.hello: - platform_allow: - - nrf54l15dk/nrf54l15/cpuapp/ns extra_configs: - CONFIG_SID_END_DEVICE_PERSISTENT_LINK_MASK=y - CONFIG_SIDEWALK_FILE_TRANSFER=y