From 78bc6566535c05b6b70efd122d451e4de7c5a553 Mon Sep 17 00:00:00 2001 From: yangm2 Date: Sun, 18 Aug 2024 12:27:56 -0700 Subject: [PATCH] add svlint to Other Design Automation tools --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index a19f29c..b26bc51 100644 --- a/README.md +++ b/README.md @@ -181,6 +181,7 @@ A curated list of amazingly awesome hardware description language projects. * [fusesoc](https://github.com/olofk/fusesoc) - Package manager and a set of build tools for HDL. * [bender](https://github.com/pulp-platform/bender) - Dependency management tool for hardware design projects. * [hbs](https://github.com/m-kru/hbs) - A lean dependency management and build system for hardware description projects. +* [svlint](https://github.com/dalance/svlint) - SystemVerilog linter compliant with IEEE1800-2017. Written in Rust, based on [sv-parser](https://github.com/dalance/sv-parser). ## PSS : Portable test and Stimulus Standard